Semiconductor memory device having improved write characteristic
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United States of America Patent
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Oct 18, 1994
Grant Date -
N/A
app pub date -
Nov 30, 1992
filing date -
Nov 29, 1991
priority date (Note) -
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Abstract
The present invention comprises a groove formed in a semiconductor substrate, a buried element isolation region formed in the groove, source and drain diffusion regions formed inside the buried element isolation region, an electrode wiring layer connected the buried element isolation region across the diffusion regions and constituted by a two-layered structure consisting of a control gate and a floating gate, and a side-wall diffusion region which extends along the groove, is in contact with the source and drain diffusion regions, and is formed at a position corresponding to at least the electrode wiring layer. As a result, the write characteristic of a non-volatile memory can be improved, and at the same time, the non-volatile memory can be micropatterned.
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