Amorphous silicon memory
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United States of America Patent
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Nov 1, 1994
Issued Date -
N/A
app pub date -
Feb 22, 1994
filing date -
May 11, 1989
priority date (Note) -
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Abstract
An analogue memory device comprises a layer of doped amorphous silicon located between a first conducting layer metal contact layer of V, Co, Ni, Pd, Fe or Mn. It has been found that the selection of one of these metals as the contact exerts a significant effect on the properties of the device, e.g. the selection of Al, Au or Cu gives no switching whereas Cr, W, Ag give digital instead of analogue switching.
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