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Abstract

A method and a system for routing cells in an ATM switch. The switch which is input buffered, employs a multiplicity of crosspoint switch planes operating simultaneously in parallel, and whose outputs are combined by an output-buffered second stage. A traffic controlling or path assignment switching stage disposed before the crosspoint switch planes improves performance in the presence of correlated traffic. The switching stage may either control the traffic randomly or adaptively. Input concentration and output expansion functions within the switch are also disclosed. The use of an 'unfair' or a predictable preference contention resolution device (CRD) in each of the crosspoint switch planes is possible in another embodiment of the invention. Advantages of the method and system include linear growth with large N in the size and complexity of both the switching circuits and the contention resolution circuits. Switch performance tends to gracefully degrade with failures in switch planes and contention resolution devices. Dense, low-cost memory with simple FIFO addressing schemes can be used to realize both the input and output buffered stages.

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First Claim