Method and apparatus for efficient read prefetching of instruction code data in computer memory subsystems
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United States of America Patent
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Nov 22, 1994
Grant Date -
N/A
app pub date -
Oct 1, 1992
filing date -
Oct 1, 1992
priority date (Note) -
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Abstract
A memory subsystem and method are disclosed in which instruction code read-prefetching is implemented in the memory subsystem itself. A single-line read-prefetch buffer is implemented in the memory subsystem. A memory controller includes an address buffer for read-prefetches, and a memory datapath includes a data buffer for read-prefetches. Smart read-prefetching is used in which only code(instruction) reads are prefetched, taking advantage of the sequentiality of code (instruction) type data as well as the page mode feature of dynamic random access memories.
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