Wiring routes in a plurality of wiring layers

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 5375069
SERIAL NO

08184753

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

A wiring processing method for determining a wiring route for connecting terminals includes a step of dividing a wirable region into a plurality of rectangular regions in a virtual region corresponding to a chip, a step of searching a rectangular region for connecting the terminals to be wired by tracing mutually crossings rectangular regions, and a step of determining a detailed wiring route inside the searched rectangular region. Since the search is conducted by use of the rectangular region as a unit, high speed search can be made.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

  • RENESAS ELECTRONICS CORPORATION

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Itoh, Takuji Ohme, JP 10 485
Satoh, Yasuo Ohme, JP 64 514

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation