Clock frequency adjustment of an electrical circuit
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United States of America Patent
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-
Jan 3, 1995
Grant Date -
N/A
app pub date -
Jun 17, 1992
filing date -
Jun 18, 1991
priority date (Note) -
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Abstract
The power consumption of an electrical device can be optimised by altering the clock frequency of circuits (MCU, 1-3) in the device which are controlled by a clock signal. The state and need for processing power of the circuits (MCU, 1-3) or blocks (21-23) in the circuits (2) is supervised, and the clock frequency of the circuit (MCU, 1-3) or block (21-23) in the device is changed according to the need for processing power. The appropriate clock frequency is selected from one of a plurality of clock signals (clk(1) . . . clk(n)), input to a selection circuit which is then coupled to the output of the selection circuit for use as the clock for the circuit.
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