System using separate transfer circuits for performing different transfer operations respectively and scanning I/O devices status upon absence of both operations
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Jan 3, 1995
Grant Date -
N/A
app pub date -
Aug 12, 1991
filing date -
Aug 12, 1991
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
An I/O controller for transferring data between a host processor and one or more I/O units. The controller interleaves processor command transfers (PIO) in the midst of direct memory access (DMA) transfers without repeated data moves. DMA transfers are suspended temporarily during the priority PIO transfer. An interrupt Scanner, for scanning the various I/O units, is also prioritized with respect to DMA and PIO transfers.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully