Array of one-bit processors each having only one bit of memory
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United States of America Patent
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Jan 3, 1995
Issued Date -
N/A
app pub date -
Jun 7, 1994
filing date -
Jul 28, 1989
priority date (Note) -
Expired
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Abstract
A mesh processor array including a plurality of one-bit processor cells arranged in a matrix. Each processor receives inputs from adjacent processors or external sources and performs a logical function involving its own present state and the inputs thereto. Control circuitry provides control information indicative of a logical function to be performed to each of the processors in parallel, and pattern selection circuitry enables selected ones of the processors to respond to the control information.
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