Copyback memory system and cache memory controller which permits access while error recovery operations are performed
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United States of America Patent
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Jan 10, 1995
Grant Date -
N/A
app pub date -
Jan 17, 1992
filing date -
Jan 22, 1991
priority date (Note) -
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Abstract
A cache memory system for controlling a cache memory. The cache memory system is connected to a central processing unit and a main memory and the cache memory system is controlled to operate in a copyback operation mode. The cache memory system includes the cache memory which operates as cache memory to the central processing unit and a control circuit, responsive to detection of an error in the cache memory, for suspending an updating operation of an entry in the cache memory in which the error was detected, controlling access to valid entries in the cache memory, and causing the cache memory to operate as cache memory only when access from the central processing unit hits the valid entries of the cache memory.
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