Method of manufacturing flat inductance element

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United States of America Patent

PATENT NO 5387551
SERIAL NO

08026027

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Abstract

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A method of manufacturing a planar inductance element, including the steps of forming a thermal oxide film, a magnetic film, a first insulating interlayer, a planar coil, and a second insulating interlayer on a first semiconductor substrate, forming an insulating film and a magnetic film on a second semiconductor substrate, and adhering the first and the second semiconductor substrates such that the coil side of the first semiconductor substrate faces the magnetic film side of the second semiconductor substrate. According to this method, a stress generated by stacking thin films can be reduced compared with that of a conventional inductance element. Therefore, a high-frequency loss can be reduced, and a quality coefficient Q can be increased.

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Patent Owner(s)

Patent OwnerAddress
KABUSHIKI KAISHA TOSHIBA1-1 SHIBAURA 1-CHOME MINATO-KU TOKYO 1050023 ?1050023

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Fuke, Hiromi Kawasaki, JP 47 971
Mizoguchi, Tetsuhiko Yokohama, JP 43 1090
Sato, Toshiro Yokohama, JP 70 1218
Sawabe, Atsuhito Yokosuka, JP 35 1136

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