US Patent No: 5,388,217

Number of patents in Portfolio can not be more than 2000

Distributing system for multi-processor input and output using channel adapters

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ATTORNEY / AGENT: (SPONSORED)
 

Importance

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Abstract

Four clusters of 16 CPU's each are each associated with a solid state memory and a main memory. Each CPU is uniquely associated with a channel arbitrator which interconnects the associated CPU to serial ports. Each channel arbitrator is associated with a set of 16 serial channels. Each serial channel is in turn interconnected to a channel adapter which includes software and firmware adapted for interacting with a specific peripheral device. Each channel adapter also has software and firmware which is device-independent for data transfer with the channel arbitrator. The channel arbitrator includes a memory port for accessing main memory through the CPU, a port for accepting service requests and providing interrupts to the CPU's, direct memory access control logic, arbitration control logic, serial ports associated with the channel adapters, and a parallel port is associated with solid state memory. Direct memory access requests are queued at the channel while higher-priority serial transfer requests are serviced. Direct memory access is provide in 64-word blocks designated by perimeter packets indicating a number of blocks, starting address in main memory, starting address in solid state memory, and an indication of the direction of transfer.

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First Claim

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Patent Owner(s)

Patent OwnerAddressTotal Patents
CRAY RESEARCH, INC.EAGAN, MN264
MORGAN STANLEY & CO., INCORPORATEDMOUNTAIN VIEW, CA707
SILICON GRAPHICS, INC.MOUNTAIN VIEW, CA505
SILICON GRAPHICS INTERNATIONAL, CORP.FREMONT, CA507

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Benzschawel, Gary E Chippewa Falls, WI 1 19
Chen, Steven S Eau Claire, WI 8 122
Heidtke, Lonnie R Chippewa Falls, WI 3 49
Simmons, Fredrich J Eau Claire, WI 1 19
Spix, George A Eau Claire, WI 25 1379

Cited Art

Patent Info (Count) # Cites Year
 
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Patent Citation Ranking

Forward Cites

Patent Info (Count) # Cites Year
 
INTERNATIONAL BUSINESS MACHINES CORPORATION (6)
5,548,791 Input/output control system with plural channel paths to I/O devices 61 1994
5,907,684 Independent channel coupled to be shared by multiple physical processing nodes with each node characterized as having its own memory, CPU and operating system image 38 1996
6,920,519 System and method for supporting access to multiple I/O hub nodes in a host bridge 23 2000
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APPLE INC. (3)
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AIWA/Raid Technlogy, (1)
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BULL S.A. (1)
6,816,927 Method and system for automatic updating an access path to the system disk of a hardware perimeter of computer 9 2003
 
COX COMMUNICATIONS, INC. (1)
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EMC CORPORATION (1)
6,317,805 Data transfer interface having protocol conversion device and upper, lower, middle machines: with middle machine arbitrating among lower machine side requesters including selective assembly/disassembly requests 18 1998
 
FREESCALE SEMICONDUCTOR, INC. (1)
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HITACHI, LTD. (1)
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SHARP KABUSHIKI KAISHA (1)
6,029,242 Data processing system using a shared register bank and a plurality of processors 11 1997
 
SILICON GRAPHICS INTERNATIONAL, CORP. (1)
5,761,534 System for arbitrating packetized data from the network to the peripheral resources and prioritizing the dispatching of packets onto the network 24 1996
 
WOODLAND VENTURE FUND (1)
6,147,991 Scalable high speed packet switch using packet diversion through dedicated channels 8 1997