Asynchronous circuit for 2-cycle to 4-cycle handshake conversion
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United States of America Patent
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Feb 7, 1995
Grant Date -
N/A
app pub date -
Mar 10, 1992
filing date -
Mar 10, 1992
priority date (Note) -
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Abstract
A two- to four-cycle handshake protocol conversion circuit suitable for on-chip implementation uses an exclusive-OR Gate and an AND Gate with one inverted input together with a latching circuit to generate the two-cycle handshake protocol acknowledge signal, A2, as a clocked version of the two-cycle handshake protocol request signal, R2, using the rising edge of the four-cycle handshake protocol acknowledge signal, A4, as the clocking input. The four-cycle handshake protocol request signal R4 is provided as the ANDed output of the complement of A4 combined with the output of the exclusive-OR Gate, the inputs of which are provided by R2 and A2. The latching network may be provided by a simple D flip-flop.
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