Process for forming copper interconnect structure

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United States of America Patent

PATENT NO 5391517
SERIAL NO

08120097

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Abstract

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A copper metallization structure and process for the formation of electrical interconnections fabricated with pure copper metal is provided. The metallization structure includes an interface layer (22) intermediate to a dielectric layer (12), and a copper interconnect (30). The interface layer (22) functions to adhere the copper interconnect (30) to a device substrate (10) and to prevent the diffusion of copper into underlying dielectric layers. The interconnect layer (22) is fabricated by depositing a first titanium layer (16) followed by the sequential deposition of a titanium nitride layer (18), and a second titanium layer (20). A copper layer (24) is deposited to overlie the second titanium layer (20) and an annealing step is carried out to form a copper-titanium intermetallic layer (26). The titanium nitride layer (18) functions as a diffusion barrier preventing the diffusion of copper into the underlying dielectric layer (12), and the copper titanium intermetallic layer (26) provides an adhesive material, which adheres the copper layer (24) to the device substrate ( 10). Following the formation of the intermetallic layer (26), the device surface is planarized to form a planar surface (28), and to form an inlaid copper interconnect (30).

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Patent Owner(s)

Patent OwnerAddress
NXP B V F/K/A FREESCALE SEMICONDUCTOR INC5656 AG HIGH TECH CAMPUS 60 EINDHOVEN

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Fiordalice, Robert W Austin, TX 18 1066
Gelatos, Avgerinos V Austin, TX 94 3259

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