Importance

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Abstract

An embodiment of the present invention describes a redundancy repair circuit fabricated in a Static Random Access Memory (SRAM) semiconductor device, with the redundancy repair circuit comprising: a plurality of thin film transistors (TFTs); a programming pad connecting to serially connected control gates of the plurality of TFTs; the plurality of TFTs having their individual source/drain terminals connecting between substitution logic and an address multiplexer. The redundancy repair circuit is operated by a method for shifting the threshold voltages of the TFTs using a programming pad connected serially to the control gates of a plurality of TFTs; the plurality of TFTs having their individual output terminals connecting between substitution logic and an address multiplexer; selecting an individual TFT by the address multiplexer; shorting at least one of the output terminals of the selected TFT to approximately a 5 V potential; shorting the output terminals of the remaining (non-selected) TFTs to approximately a 0 V potential; and applying a programming signal to the programming pad, the programming signal is sufficient to cause the threshold voltage of the selected TFT to shift approximately 1 V by injecting electrons into the TFT's gate dielectric region while not effecting the threshold voltage of each individual said non-selected TFTs.

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First Claim