Polysilicon gate bus with interspersed buffers for driving a row of pixels in an active matrix liquid crystal display
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United States of America Patent
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Mar 7, 1995
Grant Date -
N/A
app pub date -
Dec 20, 1993
filing date -
Mar 1, 1993
priority date (Note) -
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status (Latency Note)
Importance
Abstract
A polysilicon gate bus structure used for activating a row of pixels in a matrix of pixels of an active matrix liquid crystal display is described. The polysilicon gate bus is formed with a plurality of buffers interspersed along its length. A plurality of field effect transistors, each associated with one pixel in a row of pixels, have their gate electrodes connected to the polysilicon gate bus with the buffers interspersed among the gate electrode connections so as to speed up a row scanning signal propagation time to each of the gate electrode connections.
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