Dynamic random access memory
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United States of America Patent
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Mar 7, 1995
Grant Date -
N/A
app pub date -
Jul 2, 1993
filing date -
Jul 2, 1993
priority date (Note) -
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Abstract
A dynamic random access memory. The memory includes a write transistor N3 and a read transistor N2. In a preferred embodiment the write transistor has a threshold level higher than the read transistor. A sense amplifier senses and amplifies a difference in voltage between a bit line and a sense node that is developed when the read transistor permits or does not permit current to flow between ground an a bit line. Associated semiconductor device structures and fabrication techniques are also disclosed.
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