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Abstract

The instant invention relates to complex integrated circuits incorporating circuits for internal testing. The test controller has: a finite-state machine or status register (RE1 to RE4), the parallel outputs of which are looped back to the parallel inputs via a logic (LCB) which is also able to receive external control signals (TMS, TCK, TRST); multiplexers (MU1 to MU4) associated with the cells of the status register to allow for operation of the status register either in series or parallel; and a control signal generating stage (GSC) connected to the output of the register to supply control signals for other elements of the test: circuitry depending on the state defined by the status register. According to the instant invention, it is proposed that the multiplexers be provided with additional inputs making it possible to store the state of at least certain control signals in these cells for the purpose of transmitting them later for observation. It thus becomes possible not only to test the states of the status register (to verify that the finite-state machine accepts all the states it is supposed to accept) but: also to test the control signals emitted by the controller in order to verify that the control signals emitted are the desired signals. Possible faults in the test circuitry itself are thus detected more rapidly.

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First Claim