Address bus switching between sequential and non-sequential ROM searches
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United States of America Patent
Stats
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Mar 7, 1995
Grant Date -
N/A
app pub date -
Jul 31, 1991
filing date -
Jul 31, 1991
priority date (Note) -
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Abstract
A hand held electronic data processing device has an input keyboard and a display screen. A sixteen bit central processing unit (CPU) address bus addresses read only memory (ROM) and random access memory (RAM). However, a twenty bit register provides a twenty line address bus that is employed for addressing sequential data in ROM. A direct memory access (DMA) unit provides direct transfer of data from RAM to a forty bit register which controls the state of the pixels in a 240 character liquid crystal display (LCD). The keyboard is connected in an electronic matrix with rows driven by signals applied by system address bus lines. These various functions require exclusive use of the system address bus. Accordingly an address selector is employed to determine which of the functions is to capture the system address bus; the functions being (a) CPU address of ROM and RAM, (b) Register sequential address of ROM, (c) DMA address of RAM for delivery to LCD display, and (d) the driving of the rows of the keyboard matrix.
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Patent Owner(s)
| Patent Owner | Address | |
|---|---|---|
| FEP HOLDING COMPANY | C/O BARTON LLP 420 LEXINGTON AVENUE SUITE 1830 NEW YORK NY 10170 |
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Inventor(s)
| Inventor Name | Address | # of filed Patents | Total Citations |
|---|---|---|---|
| Grieb, Robert L | Medford, NJ | 4 | 18 |
| Todorovich, Mark | Medford Lakes, NJ | 10 | 24 |
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| Fee | Large entity fee | small entity fee | micro entity fee |
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| Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
| Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |
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