Macrocell comprised of two look-up tables and two flip-flops
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United States of America Patent
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Mar 21, 1995
Grant Date -
N/A
app pub date -
Jul 2, 1993
filing date -
Jul 2, 1993
priority date (Note) -
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Abstract
A macrocell for use in a programmable logic device (PLD) providing for enhanced logic capability and reduced setup time. The preferred embodiment of the macrocell includes two look-up tables, for increased fan-in, and two flip-flops that increase fan-out, thereby doubling logic capability of the PLD without unacceptably increasing device size. Doubling the register count makes this PLD particularly suitable for applications employing high density sequential logic. Furthermore, a second register can be used for receiving fast input signals form an input to the PLD to reduce setup time.
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