Method and system for buffer occupancy reduction in packet switch network

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United States of America Patent

PATENT NO 5402416
SERIAL NO

08177873

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Abstract

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A packet switch system having a buffer occupancy reduction mechanism for controlling data flow through switched nodes of the system to avoid congestion and reduce required buffer storage at the nodes. For an isochronous connection, buffers are initially allocated at each switching node connection to ensure listless transmission of packets. A buffer occupancy trace for the connection is recorded and the delay time of an isochronous packet at a particular switch port is returned to a preceding switch port. The preceding switch port employs the feedback message to delay subsequent packets through the connection to reduce the queuing time at the particular switch port. Once the isochronous connection has stabilized, buffer reallocation is performed wherein a scheduler at each switch node along the connection attempts to combine buffer allocations for different isochronous connections. This occurs provided the corresponding buffer occupancy traces of the isochronous connections do not overlap. Buffer occupancy reduction is therefore accomplished through the delaying of isochronous packets propagated through the connections of the packet switch system and the reallocating of buffers initially assigned to two or more isochronous connections.

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Patent Owner(s)

Patent OwnerAddress
INTERNATIONAL BUSINESS MACHINES CORPNEW ORCHARD ROAD ARMONK NY 10504

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Cieslak, Randall A Scarsdale, NY 2 140
Georgiou, Christos J White Plains, NY 36 1528
Li, Chung-Sheng Ossining, NY 133 5427

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