Importance

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Abstract

A display memory respectively stores, in first and second portions, digital graphics data for display in a video monitor and digital video data for display in a window in the monitor. The digital video data is transferred from the display memory to a shift register at a rate different from the pixel clock and from the shift register at a clock rate that may be lower than the pixel clock rate. The video data may be stored in a luminance and chrominance format and may be converted by a color space converter to 3 bytes representing the primary colors red, green and blue. The video pixels may then be interpolated to expand the number of video pixels. The shift register operation may be synchronized with such expansion so that data is not passed from the shift register until the expansion of previous data from the shift register has been completed. Video window logic provides for the passage of the graphics pixels through a digital multiplexer at the graphics clock rate at the monitor positions outside the window and the video pixels from the shift register through the colorspace converter and the interpolator at the monitor positions within the window. The graphics data may be delayed by a delay corresponding to that of the color space converter and the interpolator. The digital data passing through the multiplexer are latched at the graphics clock rate and are then converted to analog signals for display as a color image on the video monitor.

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First Claim