Importance

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Abstract

A security read only memory(ROM) device for maintaining security of data therein is provided. The ROM device comprises a security memory cell array 11 including a storage cell array for storing user program data and a security code cell array for storing security code data, and a control section 14 for providing a signal depending on the comparison result from the comparison section 11 so that if the external input data are equal to security code data in all addresses, the data stored in the storage cell array can be read during power-on and if not, regardless of power-on-on/off states, the data stored in the storage cell array can not be read. The ROM device also comprises an address pattern recognition section 15, responsive to a clock signal from the control section 14, address signals from row and column address buffers 1 and 2 and the reset signal from the pulse generator 13, for providing a code compare enable signal (CCES) depending on the input address signals to the control section, so that the control section 14 and the comparison section 12 can be operated after a predetermined address pattern.

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First Claim