Synchronous FIFO having an alterable buffer store
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United States of America Patent
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Apr 11, 1995
Grant Date -
N/A
app pub date -
Oct 5, 1993
filing date -
Oct 5, 1993
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A synchronous first-in, first-out ('FIFO') having an alterable buffer store includes a dual-ported, random access memory ('RAM') based memory device incorporating conventional 'empty' and 'full' flags while also providing an alternate mode of operation in which the inhibiting effects of the 'empty' and 'full' flags are disabled whereby information contained within the FIFO may be modified before being read out. The alternate mode of operation is particularly useful in asynchronous transfer mode ('ATM') networking applications.
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