Adaptive analog minimum/maximum selector and subtractor circuit
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United States of America Patent
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Apr 18, 1995
Grant Date -
N/A
app pub date -
Jun 25, 1993
filing date -
Jun 25, 1993
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Abstract
A circuit for use as a channel of a minimum selector and subtractor circuit includes a P-Channel MOS transistor having a gate connected to an input node, a source connected to the output of a current source, and a drain connected to a fixed voltage source. The source of the P-Channel transistor is connectable to a common conductive line through a first switch. The source of the P-Channel transistor is also connected to the non-inverting input of a transconductance amplifier. The inverting input of the transconductance amplifier is connected to a first plate of a capacitor. The second plate of the capacitor is connected to a fixed voltage source such as ground. The output of the transconductance amplifier is connectable to its inverting input through a second switch. The output of the transconductance amplifier forms the output of the minimum selector and subtractor circuit. A plurality of individual channel circuits may all be connected to the common conductive line. The input nodes of the individual channel circuits are each individually connected to a different one of a plurality of analog input lines. The minimum selector and subtractor circuit determines the minimum analog value appearing on the plurality of lines and subtracts that value from the input values on all of the input lines. A maximum selector and subtractor circuit is formed by reversing transistor types.
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- SYNAPTICS INCORPORATED
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Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Allen, Timothy P | Los Gatos, CA | 62 | 16456 |
Mead, Carver A | Pasadena, CA | 81 | 7830 |
Steinbach, Gunter | Sunnyvale, CA | 35 | 3252 |
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Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |
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