Configurable multiport memory interface
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United States of America Patent
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-
Apr 18, 1995
Grant Date -
N/A
app pub date -
Jul 30, 1990
filing date -
Jul 30, 1990
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
The present invention uses a logic control to determine which of a plurality of processors receives priority, and generates WAIT signals for the non-selected processor. Further, user configurable pins exist that allow the user to determine the priority that the attached processor will obtain when simultaneous chip selects are transmitted.
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