Phase delay compensator using gating signal generated by a synchronizer for loading and shifting of bit pattern to produce clock phases corresponding to frequency changes
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United States of America Patent
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Apr 18, 1995
Issued Date -
N/A
app pub date -
Dec 22, 1992
filing date -
Feb 21, 1990
priority date (Note) -
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Abstract
A phase delay compensator apparatus is provided which compensates for the phase error caused by propagation delay differences between clock and data paths within a computer system. A look-up table circuit is used to dynamically translate a change in frequency of the computer system clock or a change in the length of cable connecting the computer's sub-assemblies to a binary bit pattern defining the requisite phase-shift between distributed clock and data signals. A generator circuit produces phases of the phase-shifted clock signals, while ensuring the integrity of the loaded binary bit pattern. A gated signal is created for enabling the generator circuit.
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