Error reduction in switched capacitor digital-to-analog converter systems by balanced sampling
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United States of America Patent
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May 2, 1995
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N/A
app pub date -
Apr 6, 1993
filing date -
Apr 6, 1993
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Abstract
A switched-capacitor DAC system includes two switched-capacitor DACs and a load circuit. The switched-capacitor filter of the first DAC samples a reference voltage source, which produces a reference voltage, at a first rate and the switched-capacitor filter of the second DAC samples the reference voltage source at a second rate, greater than the first rate. The load circuit samples the reference voltage source at a rate such that the level of the reference voltage is the same each time a sample is taken. The load circuit effectively equates the sampling of the two filters and substantially eliminates problems related to gain errors and low frequency quantization noise.
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