Method of making self-aligned MOSFET

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United States of America Patent

PATENT NO 5413949
SERIAL NO

08233339

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Abstract

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This invention describes a device structure and a method of forming the device structure using a polysilicon spacer formed on the edges of the gate electrode forming a gate structure with a cavity. The channel area is self aligned through this cavity. A fully overlapped Light-Doped-Drain structure is used to improve device characteristics for submicron devices. A deep boron implant region, self aligned through the gate structure, is used to improve punch through voltage.

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Patent Owner(s)

Patent OwnerAddress
UNITED MICROELECTRONICS CORPORATIONNO 3 LI-HSIN RD II SCIENCE-BASED INDUSTRIAL PARK HSINCHU

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hong, Gary Hsin-chu, TW 225 4351

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