Integrated circuit with an active-level configurable and method therefor
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United States of America Patent
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May 9, 1995
Grant Date -
N/A
app pub date -
Apr 19, 1993
filing date -
Apr 19, 1993
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
An integrated circuit (20) configures the active level of an input, output, or input/output pin by sensing a logic state on the pin's bonding pad (21) at the inactivation of a reset signal, such as a power-on reset signal. The integrated circuit (20) selects a true or complement signal to provide to or from an internal circuit (25). The voltage level on the pin is latched on the active-to-inactive transition of the power-on reset signal. Thus, the use of proper board-level termination resistors (70, 71) programs the pins to the desired active logic level without the need for additional logic circuitry or a dedicated device pin.
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