Programmable interconnect architecture
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
May 9, 1995
Grant Date -
N/A
app pub date -
Dec 18, 1992
filing date -
Dec 18, 1992
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A programmable interconnect system includes a two-level hierarchal structure of programmable interconnect chips on a circuit board. The first-level, or 'local', interconnect chips are connected to user components. A plurality of second-level, or 'global', interconnect chips interconnect the local interconnect chips so that every local chip is connected to every global chip. Such a system allows connecting any pin of any user component to any other pin of any user component by a conductive path passing through at most three interconnect chips. A large number of such paths are provided even in embodiments with a large number of interconnect chips.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully