Logic cell using only two N type transistors for generating each logic function
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United States of America Patent
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May 23, 1995
Grant Date -
N/A
app pub date -
May 28, 1993
filing date -
Jun 2, 1992
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A programmable logic cell has two inputs and six outputs, each output being a different logical function of the inputs. Each output is generated by a pair of NMOS transistors, one transistor of each pair having its gate connected to one of the inputs and the other transistor of each pair having its gate connected to the inverse of the same input.
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