Reduction of parasitic effects in floating body MOSFETs
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United States of America Patent
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May 30, 1995
Issued Date -
N/A
app pub date -
Nov 16, 1993
filing date -
Jan 22, 1992
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Abstract
A semiconductor fabrication method improves the voltage characteristic of floating-body MOSFETs by creating recombination centers near the source-body junction of the device. A MOSFET is fabricated through the passivation oxidation stage, and a photolithography step is used to expose the source region. Implantation is then performed using one of two types of material. A first type creates electron traps of predetermined energy in the vicinity of the source-body junction. A second type creates defects in the crystalline structure of the semiconductor material. Both implantation types create recombination centers in the material. This allows the discharge through the source-body junction of charges built up in the body region.
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