Image data transfer architecture and method for an electronic reprographic machine
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United States of America Patent
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May 30, 1995
Grant Date -
N/A
app pub date -
Jun 24, 1993
filing date -
Jun 24, 1993
priority date (Note) -
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Abstract
An image data transfer architecture in which control data and image data are isolated is provided. Bidirectional buffers isolate data buses from the control bus, thereby allowing control to be maintained by an 8-bit programmed microprocessor. The controller microprocessor does not handle image data thereby reducing complex software and support components required of prior multiple 16- and 32-bit microprocessor controller systems. Isolation is achieved by having multiple data buses handling image data at various stages of processing, such as, for example, input image data, compressed image data and output image data. Additional efficiencies are realized by eliminating the inherent delays caused when high speed image output terminals are forced to share data buses with much lower speed image input terminals.
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