Apparatus and method for rapid switching between control of first and second DMA circuitry to effect rapid switching beween DMA communications
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United States of America Patent
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May 30, 1995
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app pub date -
Aug 13, 1993
filing date -
Jun 30, 1992
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Abstract
A method and apparatus for improving sustainable data throughput between a host system minicomputer and a plurality of peripheral memories utilizes a dual-ported RAM memory, a microelectronic processor with an instruction rate of 10 MIPS or greater and task switching firmware executed by the microelectronic processor for rapid switching between communication on a peripheral data bus to the peripheral memories and communication on a system data bus having a relatively higher data rate. Also disclosed is a method of data caching on the host system using the peripheral controller.
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