Method of forming interconnection in semiconductor device

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United States of America Patent

PATENT NO 5422310
SERIAL NO

08193533

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Abstract

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To form an interconnection on a substrate, an interconnection material layer is deposited on a surface of a substrate having a step with a base layer of Ti-base metal disposed between the interconnection material layer and the substrate, and the interconnection material layer is etched by way of dry etching using a fluorine gas until a surface of the base layer is exposed. After the surface of the base layer is exposed, the substrate is heated to a temperature ranging from 250.degree. C. to 600.degree. C., and the interconnection material layer and the base layer are continuously etched by way of dry etching. The process allows an interconnection pattern to be reliably formed on the stepped substrate surface.

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Patent Owner(s)

Patent OwnerAddress
SONY CORPORATIONTOKYO 108-0075

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ito, Masahiko Kanagawa, JP 139 1953

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