Self-timing random access memory
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United States of America Patent
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Jun 13, 1995
Issued Date -
N/A
app pub date -
Feb 25, 1994
filing date -
May 31, 1991
priority date (Note) -
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Abstract
A random access memory (RAM) includes a plurality of sensing circuits. During a read operation, the RAM detects that one of the sensing circuits has sensed a binary digit. In response, the read operation is terminated and an idle operation is initiated to provide a self-timing RAM. During a write operation, the data which is stored in a RAM cell is also sensed by one of the sensing circuits and the memory detects that one of the sensing circuits has sensed the stored data. In response, the write operation is terminated and an idle operation is initiated. Self-timing read and write operations are thereby provided.
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