Compact multiplexer circuit
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United States of America Patent
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Jun 27, 1995
Grant Date -
N/A
app pub date -
May 26, 1994
filing date -
May 26, 1994
priority date (Note) -
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Abstract
A design approach for a tree structure multiplexer produces a compact circuit layout by reducing the required number of transistors. The multiplexer is used to perform a binary decode of the input signals to generate a single selection of one of a number of potential outputs. since the inputs undergo a binary decode, the number of outputs is equal to 2.sup.x, where x is the number of inputs.
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