P-I-N MOSFET for ULSI applications

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United States of America Patent

PATENT NO 5432366
SERIAL NO

08070715

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Abstract

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A MOSFET device for ULSI circuits includes a semiconductor body having first and second spaced doped regions of a first conductivity type which function as source and drain regions, a third doped region between the first and second regions of a second conductivity type, and a first intrinsic region between the third doped region and the drain region, a channel of said MOSFET device including the third doped region and said first intrinsic region. Preferably the device further includes a second intrinsic region between the third doped region and the source region, the channel region of the MOSFET device including the third doped region, the first intrinsic region, and the second intrinsic region. The device further includes an insulating layer over the channel region and a gate electrode formed on the insulating layer over the channel region. A source electrode contact, the first doped region, and a drain electrode contact the second doped region. Several processes are described for fabricating the device.

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Patent Owner(s)

Patent OwnerAddress
BOARD OF REGENTS THE UNIVERSITY OF TEXAS SYSTEM210 WEST 7TH ST AUSTIN TX 78701

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Banerjee, Sanjay K Austin, TX 15 503
Bhattacharya, Suryanarayana Irvine, CA 1 18
Lynch, William T Apex, NC 34 1365

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