ECL-to-BICOMS/CMOS translator
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United States of America Patent
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Jul 18, 1995
Issued Date -
N/A
app pub date -
May 9, 1994
filing date -
Oct 2, 1992
priority date (Note) -
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Abstract
An ECL-to-BiCMOS/CMOS translator for translating a pair of differential ECL level signals into a BiCMOS/CMOS level signal is disclosed. The translator includes an output stage having an output node and a first output switching means for coupling the output node to a first voltage supply and a second output switching means for coupling the output node to a second voltage supply. A first input stage activates the first output switching means of the output stage in response to one of the differential ECL signals, and a second input stage activates the second output switching means of the output stage in response to the other differential ECL signal. The first input stage includes a first input switching means for coupling a first resistive element between the first voltage supply and the output node of the output stage, and the second input stage includes a second input switching means for coupling a second resistive element between the first voltage supply and the second voltage supply.
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