Method for fabricating a semiconductor device by high energy ion implantation while minimizing damage within the semiconductor substrate

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United States of America Patent

PATENT NO 5436176
SERIAL NO

07821647

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Abstract

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A semiconductor device having superior electrical characteristics is fabricated. 50 nm of the surface of a CZ (100) silicon substrate is oxidized to form an oxidized film. Afterwards a first ion implantation of boron ions is conducted to this silicon substrate amounting to 7.times.10.sup.13 cm.sup.-2 with acceleration energy of 1.5 MeV. Next, a first annealing in nitrogen ambient at 1050.degree. C. for 40 minutes is conducted. Through this ion implantation process a damaged layer and a dopant layer are formed within the silicon substrate. Boron ions are implanted as a second ion implantation, with a dosage of 7.times.10.sup.13 cm.sup.-2, followed by a second implanted annealing in nitrogen ambient at 1050.degree. C. for 40 minutes. Further, as a third ion implantation, boron ions are implanted with a dosage of 6.times.10.sup.13 cm.sup.-2 followed by a third annealing in nitrogen ambient at 1050.degree. C. for 40 minutes. In the dopant layer thus formed, through a plurality of repeated high energy ion implantation and subsequent annealing, in order to obtain the desired dopant concentration, density of secondary defect occurrences may be lowered.

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Patent Owner(s)

Patent OwnerAddress
MATSUSHITA ELECTRIC INDUSTRIAL CO LTDOSAKA JAPAN

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kameyama, Shuichi Itami, JP 30 692
Mizuno, Bunji Ikoma, JP 105 1611
Shimizu, Norisato Moriguchi, JP 8 108

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