Integrated circuit interconnection programmable and erasable by a plurality of intersecting control traces

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United States of America Patent

PATENT NO 5436480
SERIAL NO

08239277

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Abstract

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A programmable interconnection of an integrated circuit including a floating gate having a portion thereof sandwiched in between a X-control trace and a Y-control trace. Another portion of the floating gate is dielectrically disposed atop the channel of a Metal Oxide Semiconductor Field Effect Transistor (MOSFET). Electrical charges are couplingly induced in the floating gate through the Fowler-Nordheim (F-N) tunneling effect when both the X-control and Y-control traces are simultaneously energized. When the X-control trace and the Y-control trace are deenergized, the charged floating gate couplingly vary the electrical conductivity of the underlying channel, allowing the programmable interconnection to be programmed to be at the 'connect' or 'disconnect' states. A plurality of such programmable interconnections can also be arranged in the semiconductor substrate in a matrix of rows and columns for the ease of addressing. During usage in the field, metal conductors of the integrated circuit can be programmed to be disconnected or connected through the programmable interconnections.

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Patent Owner(s)

Patent OwnerAddress
YU SHIH-CHIANGNot Provided

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Yu, Shih-Chiang 10451 Davison Ave., Cupertino, CA 95014 7 94

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