Simulation using compiled function description language

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United States of America Patent

PATENT NO 5437037
SERIAL NO

08073810

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A simulation program conversion method and system is provided. The original simulation program is written by a function description language, such as Verilog-HDL, using a text editor, and, then, the original simulation program is converted into an executable program using a programming language, such as the C language, so that the simulation program may be compiled before execution. The speed of execution of the simulation program is significantly improved.

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Patent Owner(s)

  • MEGACHIPS CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Furuichi, Tetsuo Sanda, JP 12 170

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