Look-up table using multi-level decode
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United States of America Patent
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-
Aug 1, 1995
Grant Date -
N/A
app pub date -
Jun 11, 1993
filing date -
Jun 11, 1993
priority date (Note) -
In Force
status (Latency Note)
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Abstract
A look-up table circuit implemented with MOS transistors that uses combinational logic to generate signals that enable the transistors. A circuit using 16 inputs and 4 select lines is disclosed. Two of the select lines are used as inputs to combinational logic including four NOR gates to generate enable signals for transistors in a third stage of the circuit. This produces a reduction in the propagation delay of a signal from the input to the output of the look-up table circuit.
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