High performance, low cost microprocessor architecture

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United States of America Patent

PATENT NO 5440749
SERIAL NO

07389334

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Abstract

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A microprocessor (50) includes a main central processing unit (CPU) (70) and a separate direct memory access (DMA) CPU (72) in a single integrated circuit making up the microprocessor (50). The main CPU (70) has a first 16 deep push down tack (74), which has a to item register (76) and a next item register (78), respectively connected to provide inputs to an arithmetic logic unit (ALU) (80) by lines (82) and (84). An output of the ALU (80) is connected to the top item register at (82) is also connected by line (88) to an internal data bus (90). CPU (70) is pipeline free. The simplified CPU (70) requires fewer transistors to implement than pipelined architectures, yet produces performance which matches or exceeds existing techniques. The DMA CPU (72) provides inputs to the memory controller (118) on line (148). The memory controller (118) is connected to a RAM by address/data bus (150) and control lines (152). The DMA CPU (72) enables the CPU (70) to execute instructions four times faster than the RAM speed by fetching four instructions in a single memory cycle.

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Patent Owner(s)

Patent OwnerAddress
MOORE CHARLES H TTE UTD 03/21/2006 THE EQUINOX TRUSTPMB 157 774 MAYS BLVD STE 10 INCLINE VILLAGE NV 89451

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Fish, III Russell H Mt. View, CA 10 372
Moore, Charles H Woodside, CA 75 789

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