Receiving control logic system for dual bus network

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 5442754
SERIAL NO

07985662

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A system for controlling and routing messages and data received from dual system busses, through a bus interface unit, to a protocol translation logic means and to a processor in a central processing module connected onto a dual system bus network. The processor operates at a first clock rate and on a single-word communication protocol while the translation logic means operates at a second rate and multiple-word communication protocol. The processor and translation logic are destination modules which receive the benefit of the receiving control logic system. The receiving control logic system also services external modules on the system bus in order to receive data and control the routing of data to the destination modules. Destination modules which are busy and not ready will cause the system to inform the external transmitting modules that they must retry their transmission. The system also checks the quality of the data on the system busses and informs the processor when errors have been incurred, in addition to informing the originating modules when a transmitted message has been completed.

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Patent Owner(s)

  • UNISYS CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Datwyler, Wayne C Laguna Niguel, CA 12 210
Ricci, Paul B Laguna Niguel, CA 20 314

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