Hand held decimal timer with improved frequency division
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United States of America Patent
Stats
-
Aug 22, 1995
Grant Date -
N/A
app pub date -
Jun 8, 1994
filing date -
Jun 8, 1994
priority date (Note) -
Expired
status (Latency Note)
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Abstract
The hand held decimal timer circuit comprises: a power supply having a positive voltage output and a ground or common output; a counter circuit coupled to the power supply; a frequency divider circuit coupled to the counter circuit and to the power supply; a clock circuit including an oscillator coupled to the frequency divider circuit; a display circuit coupled to the counter circuit; a switch circuit coupled to the counter circuit; and, the frequency divider circuit including: (a) a first input for receiving a clock signal from the clock circuit, (b) a second input and a third input for receiving, respectively, a positive voltage reference and a ground voltage reference from the power supply, (c) a 12 bit binary counter which counts the clock cycles from the clock circuit and outputs, on a plurality of output pins, a number of clock cycles in binary form, (d) a pair of NAND gates each having at least three inputs and an output, the inputs being coupled to at least some of the plurality of output pins for receiving, directly and through one or more jumpers between selected ones of the output pins, a number of clock signals, (e) a NOR gate having an output and inputs which are operably coupled to the outputs of the pair of NAND gates for generating a reset signal at the output thereof for resetting the number of clock signals, (f) a capacitor coupled between the NOR gate output and ground for coupling the reset signal to the ground reference voltage to insure the 12 bit binary counter is properly reset when power is applied to the second and third inputs of the frequency divider circuit, (g) an inverter gate having an output and an input operably connected to the output of the NOR gate for generating a count signal at the output of the inverter, and (h) the frequency divider circuit having an output for outputting the count signal; and wherein the frequency of the count signal can be configured to count in one of decimal hours and decimal minutes dependent upon the jumpers connected to which selected ones of the plurality of output pins.
First Claim
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Patent Owner(s)
| Patent Owner | Address | |
|---|---|---|
| SELLIE CLIFFORD N | Not Provided |
International Classification(s)
Inventor(s)
| Inventor Name | Address | # of filed Patents | Total Citations |
|---|---|---|---|
| Sellie, Clifford N | 320 Sunset Ct., Northbrook, IL 60062-5635 | 1 | 2 |
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| Fee | Large entity fee | small entity fee | micro entity fee | due date |
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| Fee | Large entity fee | small entity fee | micro entity fee |
|---|---|---|---|
| Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
| Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |
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