Method and apparatus for implementing refresh in a synchronous DRAM system
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Aug 29, 1995
Issued Date -
N/A
app pub date -
Dec 2, 1994
filing date -
May 28, 1993
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A synchronous DRAM system with internal refresh is controlled by a refresh signal issued by an oscillator or memory controller coupled to the DRAM. By locating the oscillator on the processor or memory controller better control of the frequency of refresh is achieved, particularly, as the signal can be derived from a crystal which is not sensitive to variations in operating conditions. The oscillator drives a refresh signal on a bus or signal line to the DRAM, such that the refresh address counter is incremented and the row identified by the refresh address counter is refreshed.
First Claim
Family
International Classification(s)
- Non-US Classification not provided for expired patents
Cited Art Landscape
Patent Citation Ranking
- Citation Ranking not provided for expired patents
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully