Hardware mechanism for instruction/data address tracing
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United States of America Patent
Stats
-
Aug 29, 1995
Grant Date -
N/A
app pub date -
Apr 15, 1994
filing date -
Apr 15, 1994
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
An improved instruction tracing mechanism provides a combination of hardware, internal to the CPU, and novel software. Additional registers are added to interconnected to the CPU. These registers store values indicating the instruction address, data address, whether the instruction was a load or store, the number of bytes moved and whether any address mapping changes occurred. The registers are read by a trace interrupt handler which then provides the information to a trace buffer and a profile buffer. The end user can then access the trace and profile information through the input/output (I/O) system of the data processing system.
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