Method and arrangement for reducing electrical alternating fields generated in the surroundings of a display unit
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United States of America Patent
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Sep 12, 1995
Grant Date -
N/A
app pub date -
Jan 31, 1994
filing date -
Feb 2, 1993
priority date (Note) -
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status (Latency Note)
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Abstract
The invention relates to a method and arrangement for reducing to a minimum the electrical alternating fields generated in the surroundings of a visual display unit (1). The visual display unit includes a voltage connected part (5), on which undesirable voltage variations occur. A smoothing high voltage capacitor (C3) of high capacitance is connected to the voltage connected part (5). Connected between the high voltage capacitor (C3) and earth is a compensating circuit (20) which functions as a negative capacitor whose capacitance is greater than the capacitance of the high voltage capacitor (C3) by a given factor.
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