Non-volatile semiconductor memory device having memory cells, each for at least three different data writable thereinto selectively and a method of using the same
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United States of America Patent
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Sep 12, 1995
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N/A
app pub date -
Mar 23, 1994
filing date -
Aug 31, 1992
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Abstract
A method of writing or reading at least three different data in each memory cell, in a non-volatile semiconductor memory device having a plurality of memory cells, each memory cell having floating gate for setting a given threshold voltage in the memory cell. In addition, a non-volatile semiconductor memory device capable of checking if the data stored in the selected memory cell is correct by using one of at least two binary bits of the data as a parity bit, and a method of writing or reading data in or from that memory device.
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